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19-03-2012, 01:20 PM
Post: #1
SEVEN LEVEL DIODE CLAMPED MULTILEVEL INVERTER
SEVEN LEVEL DIODE CLAMPED MULTILEVEL INVERTER



.pdf  02_35_46_sinu7level.pdf (Size: 277.48 KB / Downloads: 98)

INTRODUCTION
In recent years, industry has begun to
demand higher power equipment, which now
reaches the megawatt level. Controlled ac drives
in the megawatt range are usually connected to
the medium-voltage network. Today, it is hard to
connect a single power semiconductor switch
directly to medium voltage grids. For these
reasons, a new family of multilevel inverters has
emerged as the solution for working with higher
voltage levels [1]. The general structure of the
multilevel inverter is to synthesize a sinusoidal
voltage from several levels of voltages, typically
obtained from capacitor voltage sources.


PWM method for Seven-level DCMLI
Pulse width modulation (PWM)
strategies used in a conventional inverter can be
modified to use in multilevel inverters. Previous
authors (McGrath, B.P. and D.G. Holmes) have
extended several different two-level multilevel
carrier-based PWM techniques as a means for
controlling the active devices in a multilevel
inverter. The most popular and easiest technique
to implement uses several triangle carrier signals
and one reference, or modulation, signal per
phase.


SIMULATION RESULTS
The gate signals of DCMLI power
circuits are produced by triangle and sinusoidal
comparison in MATLAB/Simulink blocks. The
output of five-level and seven-level DCMLI are
connected to a load and the voltage waveforms
are shown in Figure 5 & 6. In order to get THD
level of the waveform, a fast Fourier transform
(FFT) is applied to obtain the spectrum of the
output voltage, which is shown in Figures 7, 8.
The THD of the output voltage of seven-level
DCMLI is 10.47%, which shows that lower
order harmonics have been eliminated. THD
levels of seven level DCMLI and nine level
DCMLI are compared in Table 2. From the
table, it is clear that the THD value of sevenlevel
DCMLI is lower than that five-level
DCMLI.


CONCLUSION
In this paper the Five-level and nine-level diodeclamped
multilevel inverters for harmonic
elimination in MATLAB/ Simulink software
package has been presented. The THD levels of
Five-level DCMLI and Seven-level DCMLI are
compared. Simulation results reveal that the
THD of Seven-level DCMLI is less than the
Five-level DCMLI. Therefore it is concluded
that the THD will be decreased by increasing the
level of DCMLI.
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